QC Benchmarks: A Critical Element to QC Progress

Researchers at the US-based Lawrence Berkeley National Lab (LBNL) recently reported a new approach to error mitigation in a quantum computer (QC) that targets error-producing noise, a ubiquitous problem that can severely limit the performance and utility of existing and near-future quantum computers. The method developed at LBNL consists of taking an initial noisy target circuit and constructing an analogous estimation circuit that is configured specifically for accurate noise characterization. The information gathered from running the estimation circuit is then applied to correct the noise in the original target circuit.

The European Processor Initiative (EPI) recently announced that it had released its European Processors Accelerator Chip (EPAC1.0) test chip design to a semiconductor maker for fabrication. The chip consists of multiple accelerator options including a vector processing unit, a stencil and tensor accelerator, and a variable precision processor, along with supporting RISC-V cores and memory access hardware. The 25 mm2 chip will be manufactured by US-based semiconductor maker Global Foundries using their low-voltage, low-power, 22 nanometer, 22FDX process platform.