‘RISC-V is Inevitable.’ Foundation Chairman Touts the Growingly Advantageous Position of the Open ISA
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Authors: Thomas Sorensen and Earl Joseph
Publication Date: December 2022
Length: 5 pages
During the recent SC22 event in Dallas, Texas, RISC-V Foundation Chairman Professor Krste
Asanović from the EECS Department at UC, Berkeley gave a presentation detailing the technological and market position of RISC-V and its potential to become a leading ISA, supplanting the slate of proprietary ISAs that currently dominate the sector. According to Asanović, it is only a matter of time before the RISC-V instruction set architecture claims its rightful place in the HPC stack among other industry standards like Ethernet, Posix, or SQL.
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