
Researchers Employ Parallelism to Improve Quantum Annealing Performance
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Authors: Michael Feldman, Bob Sorensen
Publication Date: June 2020
Length: 3 pages
Researchers at the Tokyo Institute of Technological (Tokyo Tech) with assistance from colleagues at Hitachi, Hokkaido College, and the University of Tokyo recently announced a promising new processor architecture that could advance the performance and capability of quantum annealing systems. Known as STATICA (Stochastic Cellular Automata Annealer Architecture), the novel architecture seeks to enable more parallelism in both connectivity and computation compared with counterpart quantum annealing devices. The processor is designed to take on complex optimization problems typically found in important applications including portfolio, logistic, and traffic flow analysis workloads that often cannot be effectively computed on counterpart classical systems.
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